News

Design And Reuse18h
Synopsys and TSMC Usher In Angstrom-Scale Designs with Certified EDA Flows on Advanced TSMC A16 and N2P Processes
AI-Driven Digital and Analog Flows, Multi-Die Innovations, and Broad IP Portfolio Deliver Unmatched Performance, Power and ...
Design And Reuse18h
PQShield launches UltraPQ-Suite for deeply specialized implementations of post-quantum cryptography
PQShield, the leading provider of post-quantum cryptography (PQC) solutions, announces the launch of a newly updated product ...
Design And Reuse18h
S2C and Andes Technology Announce FPGA-Based Prototyping Partnership to Accelerate Advanced RISC-V SoC Development
S2C, a global leader in FPGA-based prototyping solutions, and Andes Technology, a premier provider of high-performance, ...
Design And Reuse18h
Andes Technology and Imagination Technologies Showcase Android 15 on High-Performance RISC-V Based Platform
Andes Technology in collaboration with Imagination Technologies today announces the successful demonstration of Android 15 ...
Design And Reuse18h
TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
A14 is designed to drive AI transformation forward by delivering faster computing and greater power efficiency. It is also ...
Design And Reuse18h
BrainChip Extends RISC-V Reach with Andes Technology Integration
BrainChip, the world’s first commercial producer of ultra-low power, fully digital, event-based, brain-inspired AI, today announced the integration of its NPUs with RISC-V cores from Andes Technology, ...
Design And Reuse18h
Cadence Enables Next-Gen AI and HPC Systems with Industry's Fastest HBM4 12.8Gbps IP Memory System Solution
The new Cadence HBM4 IP offers a PHY and a high-performance controller as a complete memory subsystem solution. The HBM4 PHY will be available as a drop-in hardened macro in the TSMC N3 and N2 ...